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STA550
70+70W STEREO
s
POWER AMPLIFIER
s
s
s s s s s s
s
MONOCHIP BRIDGE STEREO AMPLIFIER FOR BASH(R) ARCHITECTURE 55+55W OUTPUT POWER @ RL = 4/8 , THD = 0.5% 70+70W OUTPUT POWER @ RL = 4/8 , THD = 10% HIGH DYNAMIC PREAMPLIFIER INPUT STAGES EXTERNAL PROGRAMMABLE FEEDBACK TYPE COMPRESSORS AC COUPLED INPUT TO CLASS AB BRIDGE OUTPUT AMPLIFIER PRECISION RECTIFIERS TO DRIVE THE DIGITAL CONVERTER ON-OFF SEQUENCE/ TIMER WITH MUTE AND STANDBY PROPORTIONAL OVER POWER OUTPUT CURRENT TO LIMIT THE DIGITAL CONVERTER ABSOLUTE POWER BRIDGE OUTPUT
FLEXIWATT27
s s s s s
TRANSISTOR POWER PROTECTION ABSOLUTE OUTPUT CURRENT LIMIT INTEGRATED THERMAL PROTECTION POWER SUPPLY OVER VOLTAGE PROTECTION FLEXIWATT POWER PACKAGE WITH 27 PIN BASH(R) LICENCE REQUIRED
DESCRIPTION The STA550 is a fully integrated power module designed to implement a BASH(R) amplifier when used in conjunction with STABP01 digital processor.
BLOCK DIAGRAM
+VS GND -VS OUT_ PRE1 TRK_1 PWR_INP1
+ IN_PRE1 COMPRESSOR G
ABSOLUTE VALUE BLOCK
CD+1 +2 OUT1+ -1
OUT1-
OUTPUT BRIDGE ATT_REL1 V/l
CD-1
CD+ PEAK/2 DETECTOR Ict VOLTAGE PROTECTION
S1
SOA DETECTOR
PROT.
TRK_OUT THRESH THERMAL PROTECTION TURNON/OFF SEQUENCE
Ict
STBY/MUTE
S1
PEAK/2 DETECTOR
ATT_REL2
V/l CD+2 COMPRESSOR +2 G + -1 ABSOLUTE VALUE BLOCK OUT2OUT2+
IN_PRE2
OUTPUT BRIDGE
CD-2
OUT_ PRE2
TRK_2
PWR_INP2
D01AU1263
July 2003
1/16
STA550
DESCRIPTION (continued) Notice that normally only one Digital Converter is needed to supply a stereo or multi-channel amplifier system, therefore most of the functions implemented in the circuit have summing outputs The signal circuits are biased by fixed negative and positive voltages referred to Ground. Instead the final stages of the output amplifiers are supplied by two external voltages that are following the audio signal . In this way the headroom for the output transistors is kept at minimum level to obtain a high efficiency power amplifier. The Compressor circuits, one for each channel, performs a particular transfer behavior to avoid the dynamic restriction that an adaptive system like this requires. To have a high flexibility the attack / release time and the threshold levels are externally programmable. The tracking signal for the external digital converter is generated from the Absolute Value block that rectifies the audio signal present at the compressor output. The outputs of these blocks are decoupled by a diode to permit an easy sum of this signal for the multichannel application. The output power bridges have a dedicated input pin to perform an AC decoupling to cancel the compressor output DC offset. The gain of the stage is equal to 4 (+12dB). A sophisticated circuit performs the output transistor power detector that , with the digital converter, reduces the power supply voltage . Moreover, a maximum current output limiting and the over temperature sensor have been added to protect the circuit itself. The external voltage applied to the STBY/MUTE pin forces the two amplifiers in the proper condition to guarantee a silent turnon and turn-off. ABSOLUTE MAXIMUM RATINGS
Symbol +Vs -Vs VCD+ VCD+ VCDVCDVAtt_Rel1 VAtt_Rel2 VPwr_Imp1 VPwr_Imp2 VTrk_1 VTrk_2 VIn_pre1 VIn_pre2 Vthreshold Istb-max Vstbymute IOUT Parameter Positive supply voltage referred to pin 13 (GND) Negative supply voltage referred to pin 13 (GND) Positive supply voltage tracking rail referred to pin 13 (GND) Positive supply voltage operated to Vs+(1) Negative supply voltage referred to -Vs (1) Negative supply voltage tracking rail referred to pin 13 (GND) Pin 3, 25 Negative & Positive maximum voltage referred to GND (pin 13) Pin 7, 21, 18, 10 Negative & Positive maximum voltage referred to GND (pin 13) Value 30 -24 22 0.3 -0.3 -22 -0.5 to +20 Unit V V V V V V V
-20 to +20
V
Pin 8, 20 Negative & Positive maximum voltage referred to GND (pin 13) Pin 17 Negative & Positive maximum voltage referred to GND (pin 13) Pin 11 maximum input current (Internal voltage clamp at 5V) Pin 11 negative maximum voltage referred to GND (pin 13) Output Current
-0.5 to +0.5
V
-7 to +0.5 500 -0.5 7.0
V A V A
Note 1: VCD- must not be more negative than -Vs and VCD+ must not be more positive than +VS Note 2: All pins withstand 2KV ESD but not pin 11
2/16
STA550
Figure 1. Connection Diagram between STA550 and STAbp01
490 PROTECTION 2K
STABP01
VREF 1V INTERNAL CIRCUIT ON 250Hz 1V CLOCK 10 1V Q
1K 490
R
UVLO: 7V = on 5V = off + + 1V
10V 14 POWER SUPPLY1
+10V
Q
S
10V 6.82K
13 SOFT SWITCH QQ S R + 1V 12 11
OUTPUT
EMI BARRIER OPTIONAL
+ -
GROUND1
CD+ 2K
COMP VFB V+
4 3 2 ERROR AMP 2R CURRENT SENSE COMPARATOR -
SOFT SW RESET
CLK Q
D Q +
1V
6 7
4.99K 10K +10V 2200pF 1K 10pF 2.67K 499K CURRENT_SENSE 680pF DISCHARGE (RESET) TRANSISTOR FA IN 19 1V 5 100K GATE COMP/3 R
S R +
Q Q
PWM LATCH
ONE SHOT SIGNAL + FAST ATTACK CONTROL + R17 CLK 10V D Q + Q 1V OPEN DRAIN OUTPUT 15 ONE SHOT DELAY -
BUFFER OUT
1
IN_PRE1
8 COMPRESSOR 3 V/l
ATT_REL1
+25V TRK_OUT THRESH 680pF OTHER STA575 TRK-OUT +25V ATT_REL2 95K 15K 1000pF IN_PRE2 100pF 2.43K 2.55K 20 25 16 17
GND-AUDIO
GND
+
BUFFER IN
20
BUFFER -
RESET
R 18 REC_OUT 16 ONE SHOT
1V 17 1V DUTY ACCEL
+VS 14 + -
-VS 27
OUT_ PRE1 9
TRK_1 10 ABSOLUTE VALUE BLOCK
PWR_INP1 7
+2
G
-1
OUTPUT BRIDGE
S1 Ict
PEAK/2 DETECTOR VOLTAGE PROTECTION
SOA DETECTOR
THERMAL PROTECTION Ict S1 PEAK/2 DETECTOR
TURNON/OFF SEQUENCE
V/l COMPRESSOR G + ABSOLUTE VALUE BLOCK
+2
-1
OUTPUT BRIDGE
19 OUT_ PRE2
18 TRK_2
21 PWR_INP2
-
+
-
+
-
DEAD TIME
RESET
POWER_VS2 1V 8 OUTPUT CD+ GATE
9
GROUND2
ISENSE CD-
10V ISENSE
GND 13 CD+1 6 4 OUT1+ RSENSE
EMI BARRIER OPTIONAL
5
OUT1CD-1
2 15 CD+
12
PROT. OTHER STA575 PROTECTION
PROTECTION
11
STBY/MUTE
CD+2 22 24 OUT2+
RSENSE
23
OUT2CD-2
26
STA575
D02AU1391
3/16
STA550
THERMAL DATA
Symbol Tj Max Junction temperature Parameter Value 150 1 Unit C C/W
Rth j_case Thermal Resistance Junction to case .............................. ..max
OPERATING RANGE
Symbol +Vs -Vs Vs+ VCD+ VCDIin_Max Vtrheshold Tamb Isb_max Positive supply voltage Negative supply voltage Delta positive supply voltage Positive supply voltage tracking rail Negative supply voltage tracking rail Current at pin In_Pre1, In_Pre2, related to compressor behaviour Voltage at pin Threshold Ambient Temperature Range Pin 11 maximum input current (Internal voltage clmp at 5V) Parameter Value +20 to +30 -10 to -22 5V (Vs+ - VCD+) 10V +3 to 17 -17 to -3 -1 to +1 -5 to 0 0 to 70 200 Unit V V V V V mA peak V C A
PIN CONNECTION
1
27
-VS
CD+
THRESHOLD
OUT_PRE2
IN_PRE2
PWR_INP2
CD+2
OUT2+
ATT_REL2
TRK_OUT
TRK_2
OUT2-
CD-2
CD-1
ATT-REL1
CD+1
PWR_INP1
IN_PRE1
OUT_PRE1
TRK_1
PROTECTION
OUT1+
OUT1-
STBY/MUTE
GND
+VS
D01AU1251
4/16
-Vs
STA550
PIN FUNCTION
N 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 Name -Vs CD-1 Att_Rel1 Out1+ Out1CD+1 Pwr_Inp1 In_pre1 Out_pre1 Trk_1 Stby/mute Protection Gnd +Vs CD+ Trk_out Threshold Trk_2 Out_pre2 In_pre2 Pwr_Inp2 CD+2 Out2Out2+ Att_Rel2 CD-2 -Vs Negative Bias Supply Channel 1 Time varying tracking rail negative power supply Attack release rate for channel 1 Channel 1 speaker positive output Channel 1 speaker negative output Channel 1 positive power supply Input to channel 1 power stage Pre-amp input for channel 1 (virtual ground) Output channel 1 pre-amp Absolute value block input for channel 1 Standby/mute input voltage control Protection signal for STABP01 digital processor Analog Ground Positive Bias Supply Time varying tracking rail positive power supply Reference output for STABP01 digital processor Compressor threshold input Absolute value block input for channel 2 Output channel 2 pre-amp Pre-amp input for channel 2 (virtual ground) Input to channel 2 power stage Channel 2 positive power supply Channel 2 speaker negative output Channel 2 speaker positive output Attack release rate for channel 2 Channel 2 Time varying tracking rail negative power supply Negative Bias Supply Description
5/16
STA550
ELECTRICAL CHARACTERISTCS (Test Condition: Vs+ = 26V, Vs- = -22V, V CD+ = 17V, VCD- = -17V, RL = 8, external components at the nominal value f = 1KHz, Tamb = 25C unless otherwise specified
Symbol Parameter Test Condition Min. Typ. Max. Unit
PREAMPLIFIER AND COMPRESSOR Vout clamp Maximum Voltage at Out_pre pin Iin Vcontrol Audio input current Voltage at Attack_Release pin Attenuation = 0dB Attenuation = 6dB Attenuation = 26dB 0.35 6 -5 100 VCRT= 0V; Attenuation = 0dB VCRT= 0.5V; Attenuation = 6dB VCRT= 9V; Attenuation = 26dB VCRT= 0V; Attenuation = 0dB VCRT= 0.5V; Attenuation = 6dB VCRT= 9V; Attenuation = 26dB VCRT= 0V; Attenuation = 0dB VCRT= 0.5V; Attenuation = 6dB VCRT= 9V; Attenuation = 26dB -10 -250 -450 0.01 5 5 10(2) 50 60 1.5 10 250 450 0 0.5 9 10 11 12 0.8 0.65 12 -1 Vpeak mA V V V V K mV mV mV % % % V V V mA
VComp_
Th
Input voltage range for the compression Input impedance of Threshold pin Output Offset at Out_pre pin with:
Zth Voffset
THD
Distortion at Out_pre:
EN
Noise at Out_pre pin :
Ict
Attack time current at pin Attack_release
1. This value is due to the thermal noise of the external resistors Rr and Ri.
TRACKING PARAMETERS Gtrk Vtrk_out Itrk_out Ztrk_in Tracking reference voltage gain Tracking ref. output voltage Current capability Input impedance (TRK1/2) 13 0 5 14 20 6 1 7 15 V V mA M
OUTPUT BRIDGE Gout Gch Gch Pout Half Output bridge gain Output bridge differential gain Output bridges gain mismatch Continuous Output Power THD = 0.5% THD = 10% THD = 10%; RL= 4; VCD+ = 13V; VCD- = -13V; VS+ = 20V; VS- = -20V THD Total harmonic distortion of the output bridge Output bridge D.C. offset Po = 5W f = 20Hz to 20KHz; Po = 30W VOff 5.5 11 -1 50 64 64 55 70 70 6 12 6.5 13 1 dB dB dB W W W
0.01 0.1 50
% % mV
6/16
STA550
ELECTRICAL CHARACTERISTCS (continued)
Symbol EN Zbr_in Rdson OLG GB SR Parameter Noise at Output bridge pins Input impedance Output power Rdson Open Loop Voltage Gain Unity Gain Bandwidth Slew Rate IO = 1A Test Condition f = 20Hz to 20KHz; Rg = 50 100 Min. Typ. 12 140 200 100 1.4 7 180 400 Max. Unit V K m dB MHz V/s
PROTECTION Vstby Vmute Vplay Th1 Th2 Unbal. Ground Unbal. Ground UVth Pd_reg. Pd_max Iprot Ilct Stby voltage range Mute voltage range Play voltage range First Over temperature threshold Second Over temperature threshold Upper Unbalancing ground threshold Lower Unbalancing ground threshold Under voltage threshold Power dissipation threshold for system regulation Switch off power dissipation threshold Protection current slope Limiting Current threshold Referred to (CD+ - CD-)/2 Referred to (CD+ - CD-)/2 |Vs+| + |Vs-| Iprot = 50A; @ Vds = 10V @ Vds = 10V for Pd > Pdreg 5.5 25 48 400 6 6.5 0 1.6 4 130 150 5 -5 20 31 0.8 3 5 V V V C C V V V W W A/W A
I+Vs
Positive supply current
Stby (Vstby/mute pin = 0V) Mute (Vstby/mute pin = 2.5V) Play (Vstby/mute pin = 5V no signal) Stby (Vstby/mute pin = 0V) Mute (Vstby/mute pin = 2.5V) Play (Vstby/mute pin = 5V no signal) Stby (Vstby/mute pin = 0V) Mute (Vstby/mute pin = 2.5V) Play (Vstby/mute pin = 5V no signal)
4 35 35 4 35 35 100 110 110 100 110 110
mA mA mA mA mA mA A mA mA A mA mA
I-Vs
Negative supply current
ICD+
Positive traking rail supply current
ICD-
Negative traking rail supply current Stby (Vstby/mute pin = 0V) Mute (Vstby/mute pin = 2.5V) Play (Vstby/mute pin = 5V no signal)
7/16
STA550
FUNCTIONAL DESCRIPTION The circuit contains all the blocks to build a stereo amplifier. Each single channel is based on the Output Bridge Power Amplifier, and its protection circuit. Moreover, the compression function and a signal rectifier are added to complete the circuit. The operation modes are driven by The Turn-on/off sequence block. In fact the IC can be set in three states by the Stby/mute pin: Standby ( Vpin < 0.8V), Mute (1.6V < Vpin < 3V), and Play (Vpin > 4V). In the Standby mode all the circuits involved in the signal path are in off condition, instead in Mute mode the circuits are biased but the Speakers Outputs are forced to ground potential. These voltages can be get by the external RC network connected to Stby/Mute pin. The same block is used to force quickly the I.C. In standby mode or in mute mode when the I.C. dangerous condition has been detected. The RC network in these cases is used to delay the Normal operation restore. The protection of the I.C. are implemented by the Over Temperature, Unbalance Ground, Output Short circuit, Under voltage, and output transistor Power sensing as shown in the following table: Table 1. Protection Implementation
Fault Type Chip Over temperature Chip Over temperature Unbalancing Ground Short circuit Under Voltage Extra power dissipation at output transistor Maximum power dissipation at output transistor Condition Tj > 130 C Tj > 150 C |Vgnd| > ((CD+) (CD-))/2 + 5V Iout > 6A |Vs+| + |Vs-|< 20V Pd tr. >25W Protection strategy Mute Standby Standby Standby Standby Reducing DIGITAL CONVERTER output voltage. Standby Fast Fast Fast Fast Fast Related to the DIGITAL CONVERTER Fast Action time Release time Slow Related to Turn_on sequence Slow, Related to Turn_on sequence Slow, Related to Turn_on sequence Slow, related to Turn_on sequence Slow, related to Turn_on sequence Related to the DIGITAL CONVERTER Slow, related to Turn_on sequence
Pd tr. > 48W
See the POWER PROTECTION paragraph for the details Compression An other important function implemented, to avoid high power dissipation and clipping distortion, is the Compression of the signal input. In fact the preamplifier stage performs a voltage gain equal to 5, fixed by Ri and Rr external resistor, but in case of high input signal or low power supply voltage, its gain could be reduced of 26dB. This function is obtained with a feedback type compressor that , in practice, reduces the impedance of the external feedback network. The behavior of compression it's internally fixed but depends from the Audio input voltage signal level, and from the Threshold voltage applied to the Threshold pin. The attack and release time are programmable by the external RC network connected to the Att_Rel pins. The constraints of the circuit in the typical application are the following: Vthreshold range Vin peak max Vout peak max = -5 to 0 = 8V = 10V
8/16
STA550
Gain without compression (G) Max Attenuation ratio =5 = 26 dB
The following graph gives the representation of the Compressor activation status related to the Vthreshold and the input voltage. The delimitation line between the two fields, compression or not, is expressed by the formula : 2 Vthresh old V in = -----------------------------------------G Where G is the preamplifier gain without compression. In the compression region the gain of the preamplifier will be reduced (G = 2*Vthreshold/Vin) to maintain at steady state the output voltage equal 2*|Vthreshold| . Instead in the other region the compressor will be off (G = 5). The delimitation line between the two fields can be related to the output voltage of the preamplifier: in this case the formula is : V o ut = 2 Vthre sho ld
Figure 2. Compressor activation field
VIN PEAK 8 6 4 2
G=5
D01AU1264
COMPRESSION G<5
1
2
3
4
5
|Vthreshold|
The relative attenuation introduced by the variable gain cell is the following : V th 2 Attenu atio n = 20 log -- --------------------5 V in _peak The total gain of the stage will be: Gdb = 20log5 + Attenuation The maximum input swing is related to the value of input resistor, to guarantee that the input current remain under Iin_Max value (1 mA). V in_peak R i > --------------------I in_max
9/16
STA550
Figure 3. Compressor attenuation vs. input amplitude
Attenuation(dB)
0 -6 -12
|Vth =5|
|Vth
-18 -24
|Vt
=2.
5|
h=
1|
D01AU1265
1
2
3
4
5
6
7
8
|Vinpk|
ABSOLUTE VALUE BLOCK The absolute value block rectifies the signal after the compression to extract the control voltage for the external digital converter. The output voltage swing is internally limited, the gain is internally fixed to 14. The input impedance of the rectifier is very high , to allow the appropriate filtering of the audio signal before the rectification (between Out_pre and Trk pins). OUTPUT BRIDGE The Output bridge amplifier makes the single-ended to Differential conversion of the Audio signal using two power amplifiers, one in non-inverting configuration with gain equal to 2 and the other in inverting configuration with unity gain. To guarantee the high input impedance at the input pins, Pwr_Inp1 and Pwr_Inp2, the second amplifier stages are driven by the output of the first stages respectively. POWER PROTECTION To protect the output transistors of the power bridge a power detector is implemented (fig 3). The current flowing in the power bridge and trough the series resistor Rsense is measured reading the voltage drop between CD+1 and CD+. In the same time the voltage drop on the relevant power (Vds) is internally measured. These two voltages are converted in current and multiplied: the resulting current , Ipd, is proportional to the instantaneous dissipated power on the relevant output transistor. The current Ipd is compared with the reference current Ipda, if bigger (dissipated power > 25W) a current, Iprot, is supplied to the Protection pin. The aim of the current Iprot is to reduce the reference voltage for the digital converter supplying the power stage of the chip, and than to reduce the dissipated power. The response time of the system must be less than 200Sec to have an effective protection. As further protection, when Ipd reaches an higher threshold (when the dissipated value is higher then 48W) the chip is shut down, forcing low the Stby/Mute pin, and the turn on sequence is restarted.
10/16
STA550
Figure 4. Power Protection Block Diagram
RSENSE CD+1 CD+ ILOAD V/I OC1 TO TURN-ON/OFF SEQUENCE
ILIM
CURRENT COMP
MULTIPLIER V/I I_PD
X IPD IPDP IPD
PDP1
TO TURN-ON/OFF SEQUENCE
CURRENT COMP IPROT
TO PROT PAD
OPA
OPA IPDA
OUT1+
CD-
OUT1-
D01AU1266
In fig. 4 there is the power protection strategy pictures. Under the curve of the 25W power, the chip is in normal operation, over 48W the chip is forced in Standby. This last status would be reached if the digital converter does not respond quikly enough reducing the stress to less than 48W. The fig.5 gives the protection current, Iprot, behavior. The current sourced by the pin Prot follows the formula:
( Pd - Pd_av _th ) 5 10 Iprot ----------------------------------------------------------------1.25V
-4
for Pd < Pd_av_th the Iprot = 0 Independently of the output voltage, the chip is also shut down in the folowing conditions: When the currentthrough the sensing resistor, R sense, reaches 6A (Voltage drop (CD+) - (CD+1) = 700mV). When the average junction temperature of the chip reaches 150C. When the ground potential differ from more than 5V from the half of the power supply voltage, ((CD+)-(CD-))/2 When the sum of the supply voltage |Vs+| + |Vs-| <20V The output bridge is muted when the average junction temperature reaches 130C.
11/16
STA550
Figure 5. Power protection threshold Figure 6. Protection current behaviour
Ids (mA) Ilim = 6A 6 Standby
Iprot(mA)
20
Bu
4
Pd_Max = 48W
Iprot slope=0.4mA/W
2
ita tio Normal n Operation
Figure 7. Test and Application Circuit
C17 C5 R7 R11
cK
Lim
Pd_reg = 25W
10
Vds (V) 10 20 30 40
D01AU1306
10
20
30
40
50
60
Pd(W)
R3 OUT_PRE1 R1 IN_PRE1 R5 C3 R16 CD+ C12 +VS C14 C10 GND C13 -VS D1 CDR22 C15 C11 -VS -VS CD-1 CD-2 PROT R19 THRESH R18 C2 TRK-OUT PROT THRESH 27 1 2 26 16 12 17 21 13 R24 CD+1 CD+ R17 CD+2 +VS ATT_REL1 3 8 9
C7
R9 TRK_1 10 PWR_INP1 7
C1
INPUT1
4
OUT1+ 5V
5 OUT1R13
6 15 22 14 11
STBY/ MUTE
R14
MUTE
STBY
C9
R15
24
OUT2+
23 OUT2C4
TRK-OUT R20
25 ATT_REL2 18 PWR_INP2 TRK_2 R10 C8 19 20 IN_PRE2 R2 OUT_PRE2 R4 R6 INPUT2
R12
R8
C6
C16
D01AU1267
12/16
STA550
EXTERNAL COMPONENTS
Name Ri R1 = R2 Rr R3 = R4 Cac C1 = C2 Cct C3 = C4 Function Input resistor Value 10K (|G| = 5, Rr = 50K) 50K (|G| = 5, Ri = 10K 100nF (fp = 16Hz, Rac =100K ) 2.2F (Tattack = 13mSec, Vcontrol = 9V, Ict = 1.5mA) 470K (t = 1 Sec. , Cct = 2.2 F ) 10K 56K 10K 1nF 1F 10K 30K 30K 2.2F 120m 5% 4W 100K 100nF 400 , 1W 680nF 1K 40K 470 F , 63V 100pF SB360 Formula Rr R i = -----G Rr = G Rr 1 Cac = -------------------------------2 fp Rac Ict Cct = attack -----------------------Vcontrol
Feedback resistor AC Decoupling capacitor
Capacitor for the attack time
R5 = R6
Release constant time Resistor
Rct = --------Cct
R7 = R8 R9 = R10 R11 = R12 C5 = C6 C7 = C8 R13 R14 R15 C9 R16 = R17 R18 C10 = C11 R22 = R24 C12 = C13 R19 R20 C14 = C15 C16 = C17 D1
Resistor for tracking input voltage filter Resistor for tracking input voltage filter Resistor for tracking input voltage filter Capacitor for Tracking input voltage filter Dc decoupling capacitor Bias Resistor for Stby/Mute function Stby/Mute constant time resistor Mute resistor Capacitor for Stby/Mute resistor Sensing resistor for SOA detector Conversion resistor for threshold voltage Power supply filter capacitor Centering resistor Tracking rail power supply filter Protection TRK_out Power supply filter capacitor Feedback capacitor Schottky diode
Note: Vcontrol is the voltage at Att_Rel pin.
13/16
STA550
APPLICATION HINTS PREAMPLIFIER AND COMPRESSOR In the application circuit showed in figure 7, R 1/R3 (or R2/R4) ratio fix the gain of the preamplifier. If the input signal is very low, is possible to increase the gain fixing the product VinG = cost. In that case is possible to increase G decreasing R1,2 from 10K until 2K without relevant effetcs on the circuitbehavior and remaining in the operating range Iin_max = Vin_max/R1(2),<1mA. So it is possible to increase the preamplifier gain until 25. If no compression is present (equivalnt compressor Gm=0), the effects are: - The output voltage offset increase - The SNR decrease The following table shows these variations:
R1,2 10K 5K 2K VIN MAX 8V 4V 1.6V G 5 10 25 VOFFSET 15mV 30mV 75mV EN 10V 13V 20V
R3(4) = 50K and all the other external components are the same Attenuation = 0 dB If the compression is active the circuit behaviour is the same. It"s also possible to eliminate the compressor. In this case the ATT_REL (1,2) pin must be connected to gnd. STBY-MUTE CIRCUIT In the suggested application circuit (figure 7), the resistor for Standby/Mute function (R13) is connected between the Standby/Mute switches and 5V Supply. It is possible to connect the resistor to another Supply Voltage level VL, but in that case also the resistor value (R13,14) must be changed according to the following formula (fixing VSTBY/MUTE = 2.5V and R15 = 10K):
R 13 = ( 4 VL - 10 )K R 14 = ( 4 VL + 10 )K
HEADROOM In the suggested application circuit the supply voltage to obtain 75W (Power Output) on 8 (Rload) is:
V supply = V + I L, MAX R DS on
It is also possible to increase the system's efficiency forcing the headroom to follow the output signal (variable drop insteadof a constant drop). In that case:
V sup ply = V + IL ( V ) RDS on
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STA550
DIM. A B C D E F (1) G G1 H (2) H1 H2 H3 L (2) L1 L2 (2) L3 L4 L5 M M1 N O R R1 R2 R3 R4 V V1 V2 V3 MIN. 4.45 1.80 0.75 0.37 0.80 25.75 28.90 mm TYP. 4.50 1.90 1.40 0.90 0.39 1.00 26.00 29.23 17.00 12.80 0.80 22.47 18.97 15.70 7.85 5 3.5 4.00 4.00 2.20 2 1.70 0.5 0.3 1.25 0.50 MAX. 4.65 2.00 1.05 0.42 0.57 1.20 26.25 29.30 MIN. 0.175 0.070 0.029 0.014 0.031 1.014 1.139 inch TYP. 0.177 0.074 0.055 0.035 0.015 0.040 1.023 1.150 0.669 0.503 0.031 0.884 0.747 0.618 0.309 0.197 0.138 0.157 0.157 0.086 0.079 0.067 0.02 0.12 0.049 0.019 MAX. 0.183 0.079 0.041 0.016 0.022 0.047 1.033 1.153
OUTLINE AND MECHANICAL DATA
22.07 18.57 15.50 7.70
22.87 19.37 15.90 7.95
0.869 0.731 0.610 0.303
0.904 0.762 0.626 0.313
3.70 3.60
4.30 4.40
0.145 0.142
0.169 0.173
5 (Typ.) 3 (Typ.) 20 (Typ.) 45 (Typ.)
Flexiwatt27 (vertical)
(1): dam-bar protusion not included (2): molding protusion included
V C B V H H1 H3 H2 R3 R4 V1 R2 R L L1 A
V3
L4
O
L2
N
L3
V1
V2
R2 L5 G G1 F
R1 R1 R1 E
FLEX27ME
D
Pin 1
M
M1
7139011
15/16
STA550
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics (R) 2003 STMicroelectronics - All Rights Reserved is the registered trademark and patented technology of INDIGO manufacturing inc. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - United States.. http://www.st.com
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